Power Integrity Sr. Staff Engineer with our client and will be 100% Menlo Park, CA (Remote till COVID).
I have the given the complete job description below. I would appreciate if you could take a look at it and let me know if we can represent your profile with our client, if not any reference would be highly appreciated.
Job Title: Power Integrity Sr. Staff Engineer
Location: Menlo Park, CA (Remote till COVID)
Duration: Long-term Contract 6-months to begin with
Develop own physical design implementation of multi hierarchy low power designs including physical aware logic synthesis, design for testability, static timing analysis, power analysis, IR Drop, EM, in advanced technology nodes.
Resolve power issues related to physical design, identify potential low power solutions, drive execution and methodology improvements.
Perform comprehensive power analysis in vector and vector-less modes of ASIC SoC design Qualifications
Minimum of 3 - 10 years of experience in the following:
RTL2GDSIIon advanced technology nodes (7nm and below).
Low power implementation and signoff, power gating, multiple voltage rails, UPF/CPF.
Power constraints generation and validation, power analysis, interface with power integrity analysis tools.
TCL, Python and/or Perl programming.
EDA tools like DesignCompiler/Genus, Primetime/PrimePower, ICC2/Innovus, Redhawk/Voltus.
Please apply to this post for more details about the role and client.