Senior Director of Production Libraries, IPG

Senior Director of Production Libraries, IPG

12 Sep 2024
California, Santaclara, 95050 Santaclara USA

Senior Director of Production Libraries, IPG

Vacancy expired!

Job DescriptionThe IP Engineering Group (IPG) organization is responsible for developing leadership IPs that power-winning products for our customers and Intel. The Senior Director of Production Libraries directly reports to the General Manager of Foundational IP Group and is responsible for planning, execution, delivery, and support of standard cell libraries.This position requires strong analytical, project management, and business partnering/influencing skills. The candidate must have experience driving cross-organizational issues and projects to resolution, excellent written and oral communications skills, and a good understanding of Intel's highly complex products, technologies, and business strategies. The position requires strong business and technical acumen, disciplined process management, problem-solving skills, multitasking ability, and attention to quality and detail. The job is in a fast-paced environment and requires a dynamic individual to succeed. The candidate must be results-oriented, capable of synthesizing and abstracting complex information into clear messages.Responsibilities include:Working closely with partners such as TD, Advanced Design, and Design Enablement to plan the roadmap (content, schedules) to meet Platform and SoC/IP development milestones.

Extending/customizing/supporting the needs of Intel Foundry Services' external customers.

Close collaboration with suppliers such as Engineering Computing, internal TFM/Design Automation, and external EDA vendors to ensure necessary dependencies are in place to support Production Libraries execution in a timely manner.

Budget forecasting (headcount, HW, SW) to ensure smooth operation and no impact on deliverable timelines.

QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:Candidate must have a Master's Degree in Electrical Engineering with 15+ years demonstrable experience in relevant areas and a strong background in:Standard Cell Library development

Skills and experience:Deep working knowledge of all steps of the standard cell library development process, from architecture definition through the logic level, circuit/layout design, modeling, characterization, and validation.

Experience in developing libraries for a Technology Platform, aligning with PDK, EDA reference flows, and other components.

Experience in hiring the best talent, growing, and managing a large, cross-geo, diverse engineering team

Ability to provide organizational vision, make tough priority calls, and align team to the corporate directions

Strong customer orientation and relationship-building skills, possessing networking capabilities and expertise to get results across multiple groups and disciplines

Strong self-initiative and persistence, ability to deal with a high degree of ambiguity and drive clarity in key areas despite schedule pressure

Excellent communication skills, with ability to tailor presentations at right amount of detail to fit the audience, up to executive management

Written and verbal communications:Ability to synthesize abstract complex information into clear messages to create impactful presentations

Ability to interact and communicate effectively with the executive offices Intel-wide

Preferred Qualifications:Ph.D

Inside this Business GroupIP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Other LocationsUS, Arizona, Phoenix;US, California, Folsom;US, Oregon, Hillsboro;US, Texas, AustinPosting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

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