Mixed Signal Verification Architect

Renesas is seeking an experienced Mixed Signal Verification Architect to define scalable verification and validation methodologies for advanced digital power management products used in AI, datacenter, and high-performance computing applications.This role focuses on the system-level verification layer that connects analog behavior, digital implementation, firmware interaction, software tooling, validation data, and customer-facing performance. The successful candidate will help define what must be proven, how it should be measured, and how results should be correlated across models, simulation, emulation, bench validation, and silicon.The ideal candidate combines mixed-signal engineering depth with verification strategy, automation mindset, and the ability to align cross-functional teams around clear, repeatable evidence.WHY THIS ROLE MATTERSDefine verification strategy for complex mixed-signal power management systems.Improve confidence in architecture decisions by connecting requirements, models, tests, and measured data.Help execution teams converge faster by turning expert validation knowledge into reusable verification patterns.KEY RESPONSIBILITIESDefine mixed-signal verification strategy for digital power controllers and related power management products.Develop system-level verification plans covering sensing paths, ADC/DAC behavior, PWM paths, telemetry, compensation, control-loop behavior, latency, quantization, noise, limits, sequencing, and corner behavior.Establish correlation methodologies across behavioral models, RTL, analog/mixed-signal simulations, emulation, bench validation, and silicon measurements where applicable.Define measurable pass/fail criteria, coverage expectations, reference scenarios, and evidence requirements for architecture and product decisions.Collaborate with systems, analog design, digital design, firmware, design verification, validation, applications, and software/tool teams.Support automation of verification results, including consistent metrics, plots, waveforms, summaries, and structured outputs for engineering review.Identify verification gaps early and help teams close ambiguity between system intent, implementation behavior, and validation evidence.Document verification methodology, interface assumptions, test intent, correlation expectations, and residual risks clearly for technical and leadership audiences.