Working with design engineers to prepare IC layouts for tapeout on Silicon, GaAs, GaN, and other technologies.
IC Layout Designer specializing in full custom layout, includes: Full Custom RF Analog , Analog, RFIC, Mixed signal, Digital, R&D and Microprocessor I.C. Design Methodologies.
Responsible for floorplan, chip lay out, routing and verification and support/assist in tapeout and documentation.
PDK modification and SKILL scripting for design and CAD teams to support layout flows.
QUALIFICATIONS:
BS in computer science, electrical engineering, or equivalent.
Minimum of 2 years IC layout experience with background in SiGe, CMOS or GaAs, GaN for RFIC
Unwavering commitment to quality work and supporting R&D efforts.
Relevant experience and a willingness to learn is necessary.
Experience with some or all of the following EDA tools such as Cadence Virtuoso, Keysight ADS, Mentor Graphics, Calibre…
Experience with some or all of: Linux and Windows computer systems, Linux shell scripts, Skill, Perl, Python.
Candidate must be self-driven, detail-oriented & must have strong interpersonal, analytical & negotiation skills
Proven capability to work both independently and on a team.
