This position requires an Engineer with a background in post silicon validation and characterization. The ideal candidate must have hands-on experience with silicon bring-up and validation, and collaborating cross-functionally with design, system, and product engineering teams.ResponsibilitiesPerform initial silicon bring-up and debuggingValidate high speed Rx and Tx paths, PLLs including jitter analysis, eye diagram using High Bandwidth Oscilloscopes, BERT and DDR5 Application SoftwareDevelop, execute, and automate post-silicon validation and characterization test plans of critical electrical and timing parameters for high-speed memory buffer devices.Collaborate closely with designers and cross-functional partners to debug and optimize performanceGenerate clear, consistent, and well-structured reportDevelop test methodologies, procedures, and assumptions to ensure results are reproducible, and accurate across validation efforts.Support board-level debugging, signal integrity analysis
