Vacancy expired!
Job DescriptionAdvanced Design is always the first design team at Intel tackling the challenges of scaling technology to the cadence of Moore's Law. We work with industry leading design and process technologists to enable breakthroughs in power, performance, and density as we enable our product design partners to bring world-class products to the market. Join us for a fast-paced, dynamic, and richly rewarding experience on the forefront of technology.This position within in Advance Desing group oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.This is an individual contributor role.#DesignEnablementQualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a positive factor in identifying top candidates.Minimum Qualifications:Candidate must BS degree with 6+ years of experience or MS degree with 4+ years of experience or PhD degree with 2+ years of experience in Electrical or Computer Engineering or related field.6+ years of experience in the following:
IP/SoC physical design optimization and methodologies for optimal Performance, Power, Area and Cost (PPAC).
Driving physical design EDA tools, design reference and sign-off flows in advanced process technologies, DTCO PPA and EDA vendor engagement.
Low-power and multiple clock domain design.
Scripting skills using a programming language such as Python, TCL.
Driving SoC physical design execution on leading edge technologies.
Using Fusion compiler, ICC2, DC or Cadence Innovus, Genus.
Preferred Qualifications:10+ years of experience in the following:
All aspects of VLSI Design from standard cell architecture to physical design and signoff flows.
Reference design and TFM for RTL2GDS on complex cpu and/or gpu designs.
Multiple chip tapeout experience on leading edge semiconductor nodes.
Design for Test (DFT) and Design for Debug (DFD).
Inside this Business GroupAs the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Other LocationsUS, TX, Austin; US, AZ, Phoenix; US, CA, Folsom; US, CA, Santa ClaraPosting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://jobs.intel.com/en/benefitsAnnual Salary Range for jobs which could be performed in US, California: $156,410.00-$250,410.00Salary range dependent on a number of factors including location and experienceWorking ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
