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Job DescriptionFab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers.This job requisition is to seek FEOL (Front-End-Of-Line) Process Integration Principal / Sr. Principal engineering role in FSM HVM Global Yield organization, reporting to FEOL Process Integration manager. Selected candidate will own technical projects and lead other members in FEOL integration team, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.FEOL (Front-End-Of-Line) Integration Principal engineer's responsibilities include (but not limited to):
Lead complex and cross-organizational engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.
Partner with Technology Development team to lead new technology transfer projects to production fabs.
Lead a group of FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
Own NPI (New Product Introduction) in production fabs and lead engineering tasks for product-specific process optimizations to meet foundry customers specifications and requirements.
Lead engineering projects to improve product yield, quality, device performance and to reduce wafer cost.
Coordinate Process Integration team engineering support for technical interactions with internal and external customers.
Qualifications
Master's or Ph.D. in Electrical Engineering, Physics or Materials Science major.
15+ years of engineering experience in advanced node semiconductor industry in FEOL Process and Integration.
15+ years of experience in FinFET technology development or high-volume manufacturing. Experience or technical understanding in GAA (Gate-All-Around) technology architecture is strongly preferred.
10+ years of experience in collaborating with module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.
Hands-on experience in new semiconductor technology development
Problem-solving and project/program/TFT leadership experience with strong self-initiative and self-learning capabilities.
Proven track record of working across organizations through matrix structures in order to accomplish strategic objectives with conflicting priorities.
Demonstrated interpersonal skills including influencing, engaging, and motivating.
Must demonstrate strong communication skills.
Ability to work with multi-functional, multi-cultural teams.
Inside this Business GroupAs the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
