Description: 6 months contract ; Assignment will be extended Pay Rate :32/hr Location: San Jose CA
Please note: This role is 100% on-site.
In this position, you will support hands-on on-site work to electrical FAFI and physical silicon debug Lab operations including Optical Probing techniques as well as physical FA (deprocessing, nanoprobing).
Performing hands-on test data collection using tester (CMT/HDMT), Parametric Analyzer, Oscilloscope and curve tracer.
Collecting board level and package level IREM/ELITE data.
Understanding of electrical schematic and layout interpretation is required.
Optionally, performing hands-on sample prep. using polisher, CNC and various Lab equipment for FAFI and silicon debug of Intel's NG products manufactured on advanced packaging and fab process technology.
BS in science or physics or electrical engineering or equivalent.
Optional experience: Knowledge of CMOS-VLSI circuits, electronics, device physics and Fab process flows.
IC Board/system level testing knowledge and problem solving. ATE/CMT Tester usage experience is a plus.
Knowledge in LINUX, Microsoft Office (Outlook, Excel, Word, Power Point, Project) is required.
Excellent verbal and written communication skills along with operating independently with minimum supervision.
Experience working in Failure analysis Lab is a plus Top (3) skills:
- Semiconductor or Quality Control Lab exp
- Test equipment exp
- Failure Analysis fault isolation tools and techniques