Senior System Level Verification Engineer

Senior System Level Verification Engineer

12 Oct 2026
California, Sanjose, 95101 Sanjose USA

Senior System Level Verification Engineer

Design Verification Technical Team Lead position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IOT.You will be responsible for chip level verification of complex ARM based SOC HW, debugging, and ROM and FW bringup.Key ResponsibilitiesDevelop SOC system level test environment for simulation and emulation, including log generation, backdoor configuration and device modelingDevelop testplan and tests, including error condition tests and stress testsRun and debug tests in regressions, both in simulation and on emulatorWork with other teams in root-causing HW issues, and creating system level test cases for themValidation ROMWork with SW team in debugging device driver issues, and OS boots 

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