Staff CPU Performance Engineer

Staff CPU Performance Engineer

Vacancy expired!

Job Title: Staff CPU Performance Engineer
Location: Santa Clara, CA. or Austin, TX.
2 Years Contract RoleDescription:

• We are looking for a CPU performance engineer. The candidate will take part in development and research onnext generation high-end microprocessor.
• The individual shall be responsible for setting up computer architecture/microarchitecture simulation environment in the Linux environment including, but not limited to, installing/compiling simulation tools with software dependencies such as GEM5; modifying Linux environment variables; and writing shell/Python scripts.
• The individual shall be responsible coding, testing, and debugging various parts in simulator code such as GEM5. The individual will work with senior performance engineers to add, test and debug new or existing architecture/microarchitecture features mostly written in C.
• The individual shall be responsible for running simulation, and gathering and analyzing statistics including, but not limited to, compiling benchmarks such as the SPEC benchmark suite; submitting jobs to LSF grids; writing/modifying shell/Python scripts; writing and compiling simple test cases in C and/or Assembly; and producing results in various forms such as a text file, Microsoft Word or Excel files.
• Depending on the actual assignment and skill set, the candidate will focus on all or part of the technical areas below:

• Porting and developing various open-source and proprietary tools
• Porting and developing various open-source and commercial CPU workloads
• Coding, testing, and debugging various microarchitecture components such as vector-processing, load-store and data-prefetch units, to name a few
• Conducting performance analysis to identify performance bottlenecks
• Strong C and object-oriented programming skills API programming is a plus
• Familiarity with the Linux environment
• Experience in workload generation using open-source compilers and tools RISC-V is a plus
• Experience with the Python script language
• Basic understanding of ISA and Assembly code RISC-V is a plus
• Hands-on experience in CPU architecture/microarchitecture simulators GEM5 is a plus
• Basic understanding of computer architecture and microarchitecture, including out-of-order execution, memory system and pipeline design
• Must be a highly organized, detail-oriented self-starter, who can deliver independently as well as in a team environment
• Master's degree or higher preferred
• Good verbal and written communication skills